The Last Few Centimeters: Why AI Power Inefficiency Is a Wiring Problem
October 13, 2026
Every AI factory pays a tax in the form of lost power, which rarely shows up on the spec sheet. It doesn’t live in the grid interconnect, medium-voltage gear, or the power shelf, but in the last few centimeters between the DC/DC converter and the GPU, where thousands of amps at sub-1V have to move through cables, busbars, and heavy-copper PCB layers to reach the processor. Those losses occur continuously, across every GPU in every rack.
At OCP last year, CelLink argued that efficiency must span the entire power path, from the grid down to the GPU. Our new white paper, The Last Few Centimeters: Rewiring AI Infrastructure for the Next Generation of Compute, takes that argument to its logical endpoint. It examines what happens in this final stage of power delivery, why it matters at AI factory scale, and where a different physical architecture can improve performance. Here are the key take aways:
The tax nobody budgets for
Power drops from 800V to 50V, then to 12V or 6V, and finally below 1V at the silicon. Every dip increases the current, while resistive losses scale with its square. The final leg is one of the most demanding parts of the power-delivery chain, despite receiving comparatively little attention. The white paper identifies three sources of overhead:
1. Voltage droop: Inductance slows transientresponse, so engineers raise nominal voltage to stay above the processor’s minimum threshold, adding anestimated 5–15W per GPU.
2. Thermal overhead: Every watt lost becomes heat, increasing facility-level demand once cooling is accounted for.
3. Installation variability: Moving a cable even afew millimeters during assembly can change its inductance by as much as 20 nH, based on our measurements.
The physical constraints are also getting tighter. Compute components are moving closer together to maintain signal integrity, leaving power delivery, optics, and liquid cooling competing for limited space around the GPU.
We’ve solved this problem before
For more than a decade, CelLink has built flat, flexible power circuits for electric vehicles, where high current must move reliably through tightly constrained spaces. EV battery packs combine demanding electrical and mechanical requirements with years of expected service life and high-volume production. Today, we have more than four million parts in vehicles, with a success rate exceeding 99.999%.
The application has changed, but the underlying geometry problem hasn’t. Moving more current through less space without sacrificing electrical or thermal performance is the same fundamental challenge CelLink has been addressing since its founding.
Flat wins, and the data shows it
The white paper explores several physical advantages of flat conductors in AI infrastructure, including:
1. Controlled geometry
2. Direct cold-plate contact
3. Compatibility with automated assembly
The performance data shows how these characteristics translate into electrical and thermal gains.
Our flex harness delivered approximately 6x lower inductance, measuring 15.8 nH at 100 kHz versus 80.7 -103.4 nH for comparable wire cable configurations. Unlike round-wire harnesses, where conductor positioning can vary during assembly, PowerPlane's flat conductor geometry is precisely defined during manufacturing and remains consistent from system to system.
Compared with a PCB power delivery network at the same 4.5 mm height and 12 kW load, PowerPlane reduced modeled ohmic losses by nearly70%, from 397.5W to 121W. This lowered power loss from 3.28% to approximately1% of delivered power and reduced peak temperature rise from +193°C to +63°C. PowerPlane achieves this using eight layers of 500µm copper instead of 26 layers of 70µm copper.
A separate power-supply test produced a similar result: a 3.5mm flex harness ran cooler than a 5mm PCB busbar at both 35A and 40A while requiring 30% less vertical space.
From nanohenries to dollars
Nanohenries and millivolts sound small, but their impact compounds at facility scale. Using ohmic losses alone, the 276.5W reduction per 12kW tray becomes about 346W of facility power at a PUE of 1.25. That's roughly 3,000 kWh per tray each year, or $2.4 million annually across a 10,000-tray deployment at $0.08/kWh, before accounting for potential savings from lower voltage margins. In a power-capped AI factory, however, the more consequential benefit may be the compute capacity those recovered watts make available.
What this means for how we build
Achieving the benefits the new 800V power-delivery architecture may affect tray layout, motherboard design, cooling, manufacturing, and qualification. With two-year qualification cycles and next-generation platforms defined years before deployment, power delivery should be considered early in the process, alongside supply resilience. Ultimately, improving efficiency requires designing the physical infrastructure around the density and electrical demands of the compute it supports. As the industry defines its next generation of 800V AI platforms, the last few centimeters need to be part of the conversation from the start.
Read the full white paper, The Last Few Centimeters , for the complete test data, modeling assumptions, and guidance for evaluating PowerPlane with your own hardware.
About the Author:
Steve Thorne is a technology sales and marketing leader with over 30 years of experience scaling growth across the AI and data center sectors. As Chief Commercial Officer at CelLink, he brings executive leadership experience from Intel, Habana Labs, and BrainChip. He holds a B.S. in Computer Science from Georgia Tech. Connect with Steve on LinkedIn.
